1. Field of the Invention
The present invention generally relates to digital signal processors. More particularly, the invention relates to a program memory that is shared by multiple processor cores. Still more particularly, the present invention relates to the debugging of software loaded into the shared program memory using breakpoints that may be intended for one or more cores in the digital signal processor.
2. Background of the Invention
Microprocessors generally include a variety of logic circuits fabricated on a single semiconductor chip. Such logic circuits typically include a processor core, memory, and numerous other support components. Some microprocessors, such as digital signal processors (DSPs), may include multiple processor subsystems each having its own processor core, memory and other support components.
It is generally desirable for processors such as DSPs to be compact, consume very little power, and generate as little heat as possible. This is especially true for processors that reside in small, battery-powered devices such as cellular telephones, pagers, and the like. One method for reducing the size and power consumption of processors is to remove some of the redundancy of multi-core processors by allowing some support components to be shared by multiple cores.
One component that can be shared is program memory. A shared program memory provides a compact, low power alternative to conventional multi-core processors by eliminating some of the redundancy of on-board memory. With a shared program memory, some or all application program instructions are accessible and executable by some or all cores in the multi-core processor. Since each of the processor's cores may execute the same software program, memory requirements may be reduced by having the processor cores share only a single copy of the software.
It is typically necessary to debug software that is executed by a processor to ensure the software is error free and compatible with associated hardware. Software debugging, however, becomes more complicated in a multi-core processor that uses a shared program memory. One factor contributing to this difficulty is that it may be necessary to debug the processor cores independent of one another. Whereas the various processor cores in a multi-core processor may be generally identical to one another, the external devices and hardware to which the cores are coupled may be entirely different. For example, one core may be coupled to a modem while another core may be coupled to a voice encoder/decoder (“vocoder”). As such, it may be desirable or even necessary to debug the shared software application as it is executed by one core, but not necessarily as it is executed by the others. Accordingly, each core should be capable of being debugged independently of the other cores.
A conventional debug process requires a host controller coupled to the DSP to insert breakpoints into the program code. Breakpoints force the processor core to halt execution and allows the host to investigate the state of the processor and gather information such as the contents of registers and memory internal to the processor to diagnose a problem. In a multi-core processor in which all cores execute the same program in a common shared memory, it is possible, or perhaps even likely, that a core that is not being debugged will encounter a breakpoint and therefore undesirably stop program execution. It is preferable, therefore, that cores that are not being debugged execute the program code, which includes breakpoints intended for other cores, as if the breakpoints do not exist or with minimal intrusion or delay upon encountering such a breakpoint.
A related problem is when multiple processor cores are being debugged simultaneously. In this instance, the host will insert multiple sets of breakpoints for the various cores being debugged. As such, it is preferable that breakpoints set for one core do not interfere with other cores as noted above. Further, it is preferable for effective debugging, that the host keeps track of which breakpoints are associated with which cores.
It is therefore desirable to provide an improved technique for managing breakpoints in a multi-core processor. Such a technique should be able to maintain instruction consistency among shared resources so as not to corrupt program execution. That is, it is desirable for all processor cores to execute the shared program in its original form even though the program includes breakpoints that are used to debug other cores. Despite the advantages such a system would provide, to date no such system is known to exist.